Demodulating Over-the-Air Communications

Thursday, October 01 2009

Today, modern radio designs have made a predominant shift to the software-defined radio architecture. From cellular handsets to military communications devices, the flexibility to use multiple wireless standards with a common RF front end is a compelling benefit. While the architecture of a software-defined radio is well understood, the inner workings are often not. In this article, we will explain how the software-defined radio architecture can be used to demodulate an unknown over-the-air signal. In this case, we will use a software-defined PXI RF vector signal analyzer from National Instruments to prototype the software-defined radio. By understanding basic radio hardware and software fundamentals, even the novice engineer should be able to demodulate over-the-air transmissions.

Architecture of a Software-Defined Receiver

At a high level, we can describe a software-defined radio as a radio designed in such a way that classically analog functions such as demodulation and filtering are performed in software instead of in hardware. The design of a software-defined receiver is such that RF signals are downconverted to baseband (either directly or through an intermediate frequency) and sampled by analog-to-digital converter (ADC) chips. Today, the two most common software-defined receiver architectures are the zero-IF (intermediate frequency) receiver and the superheterodyne receiver^1,2. Both radio architectures are designed to produce baseband I and Q samples that can be processed digitally, either by a digital signal processor (DSP), field-programmable gate array (FPGA), or even a PC.

Figure 1 shows the basic block diagram of a zero-IF, or direct downconversion, receiver. Here, the receiver generates a local oscillator (LO) that is tuned to the center frequency of the received signal. The zero-IF design downconverts an RF signal directly to analog I and Q signals, which are sampled by two DC-coupled baseband ADCs.

Note that the block diagram shown in Figure 1 can have many variations. For example, a receiver designed to detect weaker signals might utilize multiple gain stages, and a receiver designed to demodulate signals with widely varying power (like cellular communications) might use an automatic gain control (AGC) circuit to provide variable gain.

The second common receiver architecture, the superheterodyne model, uses an analog intermediate frequency (IF) that is directly sampled by an ADC.

In Figure 2, observe that the downconverter first translates an RF signal to an intermediate frequency with a mixer. The analog IF signal can then be amplified or filtered (in this case filtered) before being sampled at IF with an ADC. Once sampled as a digital IF, the signal must still be translated to baseband with a digital downconverter (DDC). DDC implementations are common in hardware through a dedicated applicationspecific integrated circuit (ASIC), and in software. Note that the NI PXIe-5663 6.6 GHz RF vector signal analyzer used in these experiments uses the superheterodyne downconversion approach.