Real-Time Simulation and Semiautomated Design of Complex ICs

Military sensor systems require real-time processing of data which can only be achieved using a dedicated, custom IC design. Unfortunately, the design of complex, mixed signal ASICs can be cost prohibitive and the extended design times do not allow for iterative development or changing operational requirements. The SOCRE program demonstrates a platform for determining mission capability of complex ICs for use in processing real- time sensor input.

The goal of the SOCRE seedling program was to develop a simulation engine for real time emulation of large, complex mixed signal IC designs. Leveraging a compute capability at or near teraop/sec performance levels, it allows real-time evaluations of architectures and algorithms in silicon and would allow real-time verification of the system performance. An automated flow was developed to generate a silicon implementation, using the same design description used by the emulation environment. With the ability to emulate chip performance at full-rate and in-system, higher performance, lower power design options can be explored. This lead to the development of a high-level Algorithm to Architecture selection flow leveraging the early power/area/speed estimates.