Home arrow Tech Briefs arrow Information Sciences arrow Error-Free Data Acquisition and Archival for High-Bandwidth Military Applications
Error-Free Data Acquisition and Archival for High-Bandwidth Military Applications Print E-mail
Curtiss-Wright Controls Embedded Computing, Dayton, Ohio   
Oct 01 2007
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Acquiring data from sensors, transporting the data, and then archiving it for future reference has changed dramatically over the last few years. The traditional approach of collecting data from an analog-to-digital converter (ADC) with a small microprocessor to monitor the slow-changing levels of a signal is for the most part no longer adequate. Today’s new advanced military systems now employ complex sensors capable of generating streams of data with rates of 100 megabytes and greater. To transfer this high-speed data from the sensor to a processor without losing signal characteristics, designers now must digitize the data at the sensor. To meet this requirement, designers needed a protocol that would transport the digital data with minimum processing or latency. This problem was pursued by several companies, including Curtiss- Wright, and the result was the ANSI/VITA 17.1-2003 Serial Front Panel Data Port standard (S-FPDP).

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Curtiss-Wright’s Multi-Channel Serial Front Panel Data Port.
S-FPDP is designed to provide a highthroughput pathway between the sensor and processor with minimum latency or processor support. Although it is necessary to transfer the data quickly, it is also important that the data arrive with no undetected errors. Undetected errors can generate the false indication of a target, which can be just as problematic as missing the presence of an actual target. To support error detection, S-FPDP incorporates the same basic low-level structure used by the Fibre Channel standard, mainly the 8B/10B encoding and CRC.

Today’s sensors do a substantial amount of data processing even before the data is sent to the digital signal processors (DSPs). While the intelligence located in the sensor is specialized to perform a variety of functions on the data, it is not intended to support a complex communications protocol. The SFPDP protocol was intentionally made simple to support this requirement. The sensor end of S-FPDP can be as simple as a 32-bit register and a clock signal. As data becomes available in the sensor, it is presented to the S-FPDP interface and the clock line is pulsed. Subsequent data is written in the same fashion and the interface combines the resulting data into a frame with the proper controls and CRC. To minimize the transfer latency, the data is serialized and transmitted as soon as it is received.



 

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