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Applying Reconfigurable Computing to Acoustic Sensors Using FPGAs Print E-mail
Army Research Laboratory, Adelphi, Maryland   
Apr 01 2008
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A detection algorithm is then run on the FFT output magnitudes to identify possible targets. This is done in two stages. First, a peak picking algorithm estimates the noise floor and high-power frequency bins are selected with a threshold determined from that noise floor. Harmonic line analysis is performed to find groups of frequency bins that form a harmonic relationship. Groups containing enough frequency components are declared to be targets. In the second stage, beamforming is performed on the raw data at the target’s frequencies to determine exact target bearings. Finally, a tracking filter is applied to reduce the number of false reports and provide a lock on the target’s bearing, providing lines-of-bearing (LOB) updates once every second. This entire computation could be done on either the CAµS DSP or the CAµS FPGA alone.

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Figure 2. In the circular Acoustic Sensor Array, the sensors are placed on or near the ground in a geometric shape to conform the array.
Future work will focus on adapting CAµS for use with additional sensors and on miniaturizing the CAµS architecture. In this future microsensor system, the FPGA-based processor will be capable of supporting magnetic, acoustic, seismic, and imaging (day or infrared) sensors all in the same package. The FPGA will have to be reconfigured in real time to facilitate such a sensor suite.

This work was done by Mark Falco of Sanders and Andree Filipov of the Army Research Laboratory.
ARL-0036

This Brief includes a Technical Support Package (TSP).

Applying Reconfigurable Computing to Acoustic Sensors Using FPGAs (reference ARL-0036) is currently available for download from the TSP library.

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