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Prototyping Advanced Military Radar Systems Print E-mail
Apr 01 2008
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Additional advantages of an ASIC implementation in advanced sensor systems include immunity to single event upsets (SEUs) and improved Mil-Temp performance. ASIC implementations sometimes require additional compliance with International Trade in Arms Regulations (ITAR).

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Silicon Re-spins in ASIC Design (Source: Collett International Research)
The design transfer from FPGA-to-ASIC demonstrates significant advantages in design flow over developing a new integrated circuit. The same code synthesis can be used for both the FPGA and structured ASIC design. Design tools then allow designers to perform separate physical optimizations for a targeted FPGA and an ASIC die. This results in two different netlists that can be used for either FPGA implementation or ASIC design performed at the structured ASIC design center. A receiver design can progress through several prototype versions within a radar test bed before returning to the synthesis step and pursuing a structured ASIC device.

Due to the complexity of radar systems design, engineers should maintain as much flexibility as possible through system definition and prototyping with respect to digital logic elements. Later, when systems manufacturing and production systems are made, the program manager still has several options to meet changing requirements on cost, power, heat, performance, and form factor. FPGAs offer maximum design flexibility, while the design transition option to structured ASIC increases that flexibility for radar systems designers.

This article was written by J. Ryan Kenny, technical marketing manager in the military and aerospace business unit of Altera Corporation, San Jose, CA. For more information, click here.

 



 

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